A Low Power High Speed Adders using MTCMOS Technique

Addition is the most basic arithmetic operation and adder is the most fundamental arithmetic component of the processor. Two important attributes of all digital circuits, for most applications are maximizing speed and minimizing power consumption. The speed of different modules used in the design will dominate the overall performance of the system. Depending on the delay and power consumption requirements, several adders can be implemented in many ways such as carry look-ahead (CLA), carry-skip adder (CSA) and ripple carry adder (RCA). The main objective of this paper is to provide new low power solution for Very Large Scale Integration (VLSI) designers. MTCMOS is an effective circuitlevel technique that provides a high performance and low-power design by utilizing both low and high-threshold voltage transistors. MTCMOS technique has been proposed in this paper and the proposed technique has small power dissipation as compared to CMOS technique. Simulations based on BSIM 3V3 180nm CMOS technology. It shows 4 bit adders of the proposed technique have low power dissipation as compared CMOS technique. KeywordsRCA, CLA, CSA, power, MTCMOS technique.